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Department: Sales Department
Education: Bachelor's degree or above
Place: Beijing/Shenzhen/Shanghai/Hangzhou/Chengdu/Xi'an/Zhuhai

Duty:

1. Responsible for the sales and promotion of FPGA products to communication customers, developing sales plans and goals;

2. According to the marketing plan, actively carry out sales activities, promote performance growth, and complete sales tasks;

3. Responsible for strategic planning and tactical execution of FPGA in the communication market, timely reporting market feedback, and proposing improvement suggestions;

4. Manage and maintain customer relationships, customize long-term strategic cooperation plans for customers, monitor customer satisfaction, and actively solve customer problems.

Factor:

1. Education: Bachelor's degree or above; 

2. Major: Priority given to majors related to electronic engineering, marketing, etc; 

3. Experience requirements: More than 3 years of sales management experience, with FPGA sales experience and large-scale communication equipment customer marketing experience preferred; Priority will be given to those with sales management experience in semiconductor, communication, and other related fields; 

4. Background requirements:

① Management ability: Previously held partial responsibilities in a certain professional field of the department, participated in major departmental decisions, led and promoted the development of work in this business field, managed and trained employees in this business field to complete work tasks;

② Planning ability: able to observe the difficulty of tasks or projects, set goals, break down work into different process steps, develop work plans and arrange work, and adjust according to the problems that arise in the work;

③ Communication ability: able to reach basic consensus with others in a pleasant atmosphere through various expressions and arrangements of communication environment;

④ Teamwork: When completing one's own job and receiving requests from others, one is more willing to assist others;

⑤ Execution ability: able to voluntarily execute decisions from superiors and lead teams in various operational activities;

⑥ Sense of responsibility: Take work seriously and responsibly, and can complete it with quality and quantity within the specified time.

Factor:

1. Have excellent sales skills and negotiation skills, and be familiar with the market situation of the chip industry;

2. Have a good sense of customer service and problem-solving ability, understand the market and customer needs;

3. Have a good team spirit and be able to take the initiative to complete work tasks;

4. Have a sense of responsibility and professionalism, have good ability to work under pressure, and be good at challenges;

5. Have good communication skills and communication skills, quick response, strong expression skills, and affinity.

2024-05-17 15:30:20

Department: Department of Public Affairs
Education: Bachelor's degree or above
Place: Beijing

Duty:

1. Assist the general manager or chief engineer in daily technical management work, including but not limited to project management, project progress tracking, and quality control;

2. Assist in managing technical resources, responsible for organizing, archiving, and updating internal technical information of the company, ensuring the accuracy and traceability of the information;

3. Participate in project application work, including evaluating and screening project proposals, writing project applications, preparing application materials, tracking application progress, etc;

4. Organize and participate in project training for the technical team, organize and participate in project meetings, record meeting minutes, and supervise the implementation of meeting decisions;

5. Maintain close cooperation and good communication with the R&D team, marketing and sales department, and clients to ensure accurate understanding and effective communication of project requirements;

6. Responsible for the management of contract materials within the company;

7. Complete other technical management and project related tasks assigned by department leaders.

Factor:

1. Education: Bachelor's degree or above; 

2. Major: Electronic Engineering, Microelectronics, Computer Science and other related majors; 

3. Experience requirements: 1-3 years or more of technical management work experience, with priority given to those with project management or technical document writing experience; 

4. Background requirements:

① Professional ability: able to operate and execute according to recommended procedures under moderate supervision; Effective collaboration with colleagues and external personnel related to work;

② General skills: Possess basic framework knowledge of the position, require guidance from superiors, collaborate with colleagues to complete work tasks, and maintain consistent learning habits;

③ Organizational influence: Possess the ability to summarize and summarize, and be able to share small-scale work experience within the team.

Factor:

1. Have good communication skills and team spirit, and be able to communicate effectively with personnel from different departments and levels;

2. Strong organization and coordination skills and time management skills, able to handle multi-line tasks and ensure that the project is completed on time;

3. Proficient in using office software, such as Microsoft Office, PDF, mind map, etc., with basic data analysis ability;

4. Have strong problem-solving skills and logical thinking skills, and be able to quickly respond to complex situations

5. Good written and oral communication skills in both English and Chinese, able to write technical documents and project reports.

2024-05-17 14:59:38

Department: Product Engineering Department
Education: Bachelor's degree or above
Place: Beijing

Duty:

1. Responsible for developing corresponding Test Plans based on the chip product manual;

2. Responsible for the design and production of testing hardware such as Loadboard and ProbeCard;

3. Responsible for testing pattern conversion, developing and debugging CP and FT testing programs;

4. Responsible for NPI import, testing program optimization, and yield improvement of products, solving problems encountered during chip mass production;

5. Cooperate to complete the related work of chip reliability experiments.

Factor:

1. Education: Bachelor's degree or above; 

2. Major: Engineering related majors such as microelectronics and automation are preferred; 

3. Experience requirement: At least 1 year of experience in chip testing program development and mass production; Priority given to those with work experience in the semiconductor industry or research companies;

4. Background requirements:

① Professional ability: Able to engage in specific design, process improvement, and other technical assistance work; Capable of completing specific single function development;

② Universal ability: requires clear definition and communication from superiors or colleagues regarding responsible tasks and completed outputs, and provides support at all times to achieve target requirements; Able to cooperate in completing routine and slightly complex work tasks;

③ Organizational influence: Possess a certain ability to summarize and summarize.

Factor:

1. Have the ability to develop test programs for a test platform; (V93K, J750, UltraFlex, Chroma, etc.);

2. Knowledge of PCB design process, PCB signal integrity and power integrity;

3. Have good communication and coordination skills, be able to work effectively with different departments and teams to deal with complex matters;

4. Have good communication skills and problem analysis skills;

5. Mastery of Python or Perl scripting language is preferred.

2024-05-17 15:07:10

Department: Application Systems Department
Education: Bachelor's degree or above
Place: Beijing/Xi'an/Zhuhai

Duty:

1. Responsible for the research and development of the company's FPGA solution;

2. Responsible for the design and debugging of FPGA related demo boards in the company;

3. Responsible for FPGA implementation of requirements and customized development of customer function requirements;

4. Cooperate with sales personnel to provide technical explanations and product demonstrations of projects and solutions for customers;

5. Assist or develop, design, debug, etc. for customer products;

6. Provide rational suggestions to the technical department to provide strong decision-making support for the overall product planning and sales policy formulation.

Factor:

1. Education: Bachelor's degree or above; 

2. Majors: Electronics related majors such as microelectronics, electronic information, and communication engineering are preferred; 

3. Experience requirements: Master's degree with at least 3 years or bachelor's degree with at least 5 years of FPGA related research and development experience;

4. Background requirements:

① Professional ability: able to be responsible for organizing and developing small projects or specific products, as well as improving processes, with zero errors in work;

② General ability: Independently organize and be responsible for small projects within the organization, have independent judgment on problems, have preliminary insights into problem identification and priority allocation, can seek resources to solve problems, and demonstrate a certain ability to solve complex problems; Being able to make significant contributions to the goals and value outputs of third level departments;

③ Organizational influence: possessing a certain level of professional influence within the group or team; Identify and guide the work of junior/intermediate engineers; Share work experience within the team.

Factor:

1. Familiar with Xilinx or Altera devices, able to use relevant software for design and debugging;

2. Rich experience in circuit board design and debugging, especially DDR3, DDR4 and high-speed transmission protocols;

3. Experience in RTL design of DDR3, DDR4 and Serdes, able to complete relevant design and verification work independently;

4. Familiar with hardware circuit design and hardware debugging;

5. Cheerful personality, good communication skills, presentation skills, collaboration skills and customer service awareness.

2024-05-17 15:12:22

Department: Application Systems Department
Education: Master
Place: Beijing/Xi'an

Duty:

1. Responsible for the research and development of the company's FPGA solution;

2. Responsible for the design and debugging of FPGA related demo boards in the company;

3. Responsible for FPGA implementation of requirements and customized development of customer function requirements;

4. Cooperate with sales personnel to provide technical explanations and product demonstrations of projects and solutions for customers;

5. Assist or develop, design, debug, etc. for customer products;

6. Provide rational suggestions to the technical department to provide strong decision-making support for the overall product planning and sales policy formulation.

Factor:

1. Education: Master's degree or above; 

2. Majors: Electronics related majors such as microelectronics, electronic information, and communication engineering are preferred; 

3. Experience requirements: Master's degree with at least 3 years of FPGA related research and development experience;

4. Background requirements:

① Professional ability: able to be responsible for organizing and developing small projects or specific products, as well as improving processes, with zero errors in work;

② General ability: Independently organize and be responsible for small projects within the organization, have independent judgment on problems, have preliminary insights into problem identification and priority allocation, can seek resources to solve problems, and demonstrate a certain ability to solve complex problems; Being able to make significant contributions to the goals and value outputs of third level departments;

③ Organizational influence: possessing a certain level of professional influence within the group or team; Identify and guide the work of junior/intermediate engineers; Share work experience within the team.

Factor:

1. Familiar with Xilinx or Altera devices, able to use relevant software for design and debugging;

2. Rich working experience in the field of software defined radio, radar and other digital signal processing;

3. Familiar with Zynq or SoC FPGA;

4. Cheerful personality, good communication skills, presentation skills, collaboration skills and awareness of customer service.

2024-05-17 15:25:23

Department: Marketing Department
Education: Bachelor degree or above
Place: Beijing

Duty:

1. Master FPGA/ARM/dsp/zynq and other contents, work closely with product managers and R&D engineers, organize the preparation of documents according to product requirements and technical design, including but not limited to product user documents, technical documents, online help and other types of documents, organize the document review, and be responsible for the update and release of the version.

2. Integrated and optimized the archived materials, cooperated with the Marketing Department in planning and compiling content systems in the form of copywriting, tutorials, practices, diagrams, multimedia, etc., to provide complete support for market publicity.

3. Responsible for patent affairs of the company's projects, including patent writing, patent process management, archives management, etc.

4. Pay attention to the hot information of the microelectronics industry, and be able to respond quickly and complete the innovation and combination of relevant text content through the company's overall business needs and regular optimization of hot data of research and development progress.

5. Complete other tasks assigned by superior.

 

Factor:

1. Bachelor degree or above in electronics, microelectronics, automation, communication or related majors, non-related majors are not allowed;

2. Have basic knowledge of digital circuit, understand the use and basic knowledge of FPGA; Good ability of electronic circuit analysis; Experience in aerospace and aviation is preferred.

3. Understand patent law, have patent retrieval ability, proficient in English, can correctly understand domestic and foreign literature content, familiar with patent application process and have the ability to write patent application draft.

4. Excellent language comprehension, information architecture and document writing skills, familiar with technical document styles.

5. Understand the use process of Vivado and Quartus;

6. Have team spirit, sense of responsibility, initiative and strong communication skills.

 

2022-08-26 14:59:53

Department: Investment and Financing Department
Education: Bachelor's degree or above
Place: Beijing

Duty:

1. Responsible for formulating the company's investment and financing strategy, planning and implementing suitable financing plans based on the company's development needs and market conditions;

2. Responsible for the overall management of financing projects, including project planning, fundraising, negotiation agreements, due diligence, contract signing, etc., to ensure the smooth progress and achievement of financing project goals;

3. Track and analyze the dynamics and trends of the capital market, participate in the company's market promotion activities, communicate and connect with potential investors, and improve the company's visibility and investment attractiveness;

4. Assist in managing the company's investment portfolio, including monitoring and performance evaluation of existing investment projects, and propose optimization plans;

5. Evaluate and screen potential investment opportunities, conduct due diligence and risk analysis, and provide suggestions and opinions for the company's investment decisions;

6. Maintain good cooperative relationships with financial institutions, investment institutions, shareholders, and other relevant parties, and establish and maintain long-term stable financing channels.

Factor:

1. Education: Bachelor's degree or above; 

2. Majors: Finance, Economics, Investment Management and other related majors are preferred; 

3. Experience requirements: More than 10 years of experience in investment and financing management; Priority will be given to those with experience in investment and financing in the semiconductor industry or research companies; 

4. Background requirements:

① Professional ability: Possess stable and reliable creative execution ability, work independently, and only receive guidance in the most complex situations; Having a functional and cross module perspective, able to lead complex collaborations with external personnel;

② General ability: Proficient in professional theories of multiple modules, able to lead and be responsible for completing department level projects;

③ Organizational influence: possessing a certain level of professional influence within the team; Able to identify and guide the work of specialists/senior specialists; Can precipitate methodology and promote its application. 

Skill requirements:

1. Possess rich experience in investment and financing, familiar with various financing methods and tools such as equity financing, bond financing, mergers and acquisitions, and restructuring;

2. Familiar with the operation and regulations of the capital market, understand the trends and developments of the investment industry;

3. Possess excellent project management skills, able to effectively organize and manage complex financing projects;

4. Possess strong analytical and decision-making abilities, able to independently evaluate investment opportunities and risks, and propose suggestions and solutions;

5. Proficient in using financial analysis and investment software tools, with good data analysis and report writing skills;

6. Possess good communication and coordination skills, able to effectively cooperate and communicate with various stakeholders.

Factor:

1. Have rich experience in investment and financing, and be familiar with various financing methods and tools such as equity financing, bond financing, mergers and acquisitions;

2. Familiar with the operation and regulations of the capital market, and understand the trends and developments of the investment industry;

3. Excellent project management skills, able to effectively organize and manage complex financing projects;

4. Strong analytical and decision-making skills, able to independently evaluate investment opportunities and risks, and make suggestions and solutions;

5. Proficient in the use of financial analysis and investment software tools, with good data analysis and report writing skills;

6. Have good communication and coordination skills, and be able to cooperate and communicate effectively with various stakeholders.

2024-05-17 15:34:46

Department: EDA software development Department
Education: Bachelor's degree or above
Place: Beijing

Duty:

1. Develop and optimize various algorithm modules of EDA software, achieving netlist optimization, synthesis algorithm, layout and routing algorithm, and Verilog/VHDL netlist parser development;

2. Develop and maintain graphic modules in EDA software, including functions such as drawing, layout and wiring, GUI design, and related simulation toolkits;

3. Participate in the design and development of circuit programming and debugging software;

4. Provide technical support and training, and write relevant design output documents;

5. Complete other tasks assigned by superiors.

 

Factor:

1. Education: Bachelor's degree or above;

2. Major: Computer and software engineering related majors, electronic science and technology, microelectronics related majors;

3. Experience requirement: At least 5 years of experience in EDA software development; Having experience in leading teams;

4. Background requirements:

① Professional ability: able to be responsible for organizing and developing small projects or specific products and modules, as well as technical improvement work, with zero error in work;

② General ability: Independently organize and be responsible for small projects within the organization, have independent judgment on problems, have preliminary insights into problem identification and priority allocation, can seek resources to solve problems, and demonstrate a certain ability to solve complex problems; Being able to make significant contributions to the goals and value outputs within the group;

③ Organizational influence: possessing a certain level of professional influence within the group or team; Identify and guide the work of junior/intermediate engineers; Share work experience within the team.

 

 

 

Factor:

1. Proficient in C++ or other related programming languages, with good programming ability and code optimization ability;

2. Familiar with FPGA EDA software tools, understand their architecture, functions and workflow;

3. Have certain work experience in the development of various modules of EDA software, and be familiar with synthesis, layout and wiring and other related algorithms and technologies;

4. Have certain knowledge of electronic design and circuits, understand common circuit components, design processes and standards;

5. Be able to read English literature proficiently, refine algorithms and write programs according to specific needs and scenarios;

6. Have innovative thinking about software development, and be able to put forward suggestions for improvement and optimization.

2022-08-26 13:16:55

Department: Chip development department
Team: Customize the back-end group
Education: Bachelor degree or above
Place: Beijing/Zhuhai/Xi 'an

Duty:

1. Responsible for the design and implementation of fully customized circuit layout;

2. Complete chip design and verify relevant documents;

3. Provide chip related technical support to internal and external customers.

 

 

Factor:

1. Bachelor degree or above in microelectronics or similar major;

2. Basic knowledge of IC process and layout, good knowledge reserve of semiconductor physics and semiconductor devices;

3. Understand back-end design EDA tools, methods and processes;

4. Familiar with linux/windows/office software;

5. Good communication and learning skills;

6. More than 1 year relevant working experience.

 

2022-08-26 13:22:06

Department: Chip development department
Team: SOC design group
Education: A master's degree
Place: Beijing/Zhuhai/Xi 'an

Duty:

1. Participate in the design and development of digital circuits in chip design projects, and realize the functional and performance requirements of digital circuits in chip products;

2. Carried out RTL design, wrote chip design and verified relevant documents;

3. Provide chip related technical support to internal and external customers.

 

 

Factor:

1. Master degree or above in electronics, microelectronics or related major;

2. Have basic knowledge of digital circuit, understand semiconductor physics and semiconductor device knowledge; Good ability of electronic circuit analysis;

3. Be familiar with the digital front end design EDA tools, methods and processes, will use verilog/shell/SystemVerilog/perl language, FPGA design experience is preferred;

4. Familiar with ARM or RSIC-V CPU architecture, familiar with common peripheral interface UART, SPI, I2C, USB and other peripherals is preferred;

5. Familiar with common memory NORFlash, NANDFlash, DRAM, etc. is preferred;

6. Have team spirit, sense of responsibility, initiative and strong communication skills.

2022-08-26 13:27:44

Department: Chip development department
Team: eFPGA Design Group
Education: A master's degree
Place: Beijing/Zhuhai/Xi 'an

Duty:

1. Responsible for the design of fully customized circuits in chip design projects to meet the requirements of function, performance and reliability of chips;

2. Complete documents related to chip design verification;

3. Provide chip related technical support to internal and external customers.

 

Factor:

1. Master degree or above in microelectronics, semiconductor or related major;

2. With FPGA chip or SRAM, DRAM, Flash memory circuit design experience is preferred;

3. Familiar with the design, verification and delivery process of customized circuit IP;

4. Proficient in EDA tools such as hspice/finesim/xa/ Xa-VCS /calibre/ and cadence integrated circuit design environment such as virtuoso/spectre;

5. Familiar with shell, perl, python and other scripting languages;

6. Skilled in using circuit simulation software to establish correct simulation test platform and correctly analyze circuit simulation results;

7. Experience in successful streaming for many times;

8. Good team work spirit, dedicated and responsible;

2022-08-26 14:18:30

Department: Chip development department
Team: Simulation design group
Education: Bachelor's degree or above
Place: Beijing/Xi 'an

Duty:

1. Responsible for the simulation of front-end circuit design, overall circuit design development and verification in chip design projects, and realize the function and performance requirements of the chip; 

2. Have a deep understanding of the working principle of complex functional modules, be familiar with filters of various structures, and have certain code and system modeling capabilities;

3. Familiar with the module development process, can independently complete each link, such as circuit implementation scheme, circuit design, simulation verification, and guide the back-end to process key signals and digital-analog interface signals;

4. Master the use of common test instruments and complete relevant documents for chip design verification; 

5. Have the ability to formulate new plans and develop new processes, and provide chip-related technical support for internal and external customers;

6. Complete other matters arranged by superiors.

Factor:

1. Education: Bachelor's degree or above;

2. Majors: Electronics, microelectronics and other related majors are preferred;

3. Experience requirement: At least 5 years of experience in analog circuit design; Having experience in leading teams;

4. Background requirements:

① Professional ability: able to be responsible for organizing and developing small projects or specific products, as well as improving processes, with zero errors in work;

② General ability: Independently organize and be responsible for small projects within the organization, have independent judgment on problems, have preliminary insights into problem identification and priority allocation, can seek resources to solve problems, and demonstrate a certain ability to solve complex problems; Being able to make significant contributions to the goals and value outputs of third level departments;

③ Organizational influence: possessing a certain level of professional influence within the group or team; Identify and guide the work of junior/intermediate engineers; Share work experience within the team.

Factor:

1. Familiar with EDA software such as virtuoso, spectre, office, hspice, finesim, xa, matlab, xa-vcs, ams, ads/hfss/emx, vivado/ise, etc.;

2. Have certain scripting skills, such as python, skill, perl, veriloga, etc.;

3. Familiar with various structures of amplifiers, LDOs, bandgaps, bias current sources, constant transconductance/swing current sources, interpolators, mixers, analog/data filters;

4. Have a solid foundation in multiple fields (such as PLL, DLL, SERDES, DC-DC, ADC, RF, DDR), have strong independent delivery capabilities and can help teams solve difficult problems, and have strong ability to work under pressure;

5. Familiar with the back-end and digital development process, with the key signals in the layout and the signal processing ability of the digital-analog interface;

6. Have team building and leadership skills.

2022-08-26 13:34:04

Department: Chip development department
Team: ASIC back-end group
Education: Bachelor degree or above
Place: Beijing/Zhuhai/Xi 'an

Duty:

1. Responsible for the top-level layout, pin-assign and feed-thru insertion;

2. Responsible for guiding or completing the whole process of the back-end at the module level. From RTL to GDS;

3. Responsible for related signoff check, such as timing signoff, pv signoff;

4. Responsible for planning and implementing the global clock network;

5. Responsible for power ground planning, and completed EMIR related inspection;

6. Responsible for PAD planning of SOC, and assist packaging and board engineers to complete SI/PI analysis

7. Assist front-end and DFT engineers in related work, and participate in SDC inspection and optimization

 

Factor:

1. Understand the whole process of digital IC design, and have experience in top-layer physical design/time convergence/physical verification of large chips;

2. Familiar with the basics of digital circuits, timing check and timing constraints

3. Familiar with power consumption analysis and power supply reliability analysis, have certain cognitive ability of layout structure and physical design rules;

4. Familiar with the global clock tree design and check process

5. Familiar with more than one scripting language, such as python, perl, tcl, etc.

6, skilled use of digital backend mainstream EDA tools

 

2023-05-23 17:20:34

Department: Chip development department
Team: Core Development Team
Education: A master's degree
Place: Beijing/Zhuhai/Xi 'an

Duty:

1. Responsible for chip top layer or IP integration verification;

2. Worked with designers to develop verification specifications and test plans, and built verification platform based on UVM;

3. Executed verification plan, wrote test cases, carried out recursive testing, and completed debugging and repair of problems;

4. Responsible for coverage convergence, design and write cross-check before completing signoff test cases;

5. Conduct gate level function and timing simulation;

6. Support the bringup of the chip.

 

Factor:

1. Master degree or above in microelectronics, computer, communication or related field;

2. Familiar with IC verification process, have rich experience in IP/SOC verification and successful streaming film;

3. Familiar with SystemVerilog and UVM verification methodology;

4. Familiar with bus protocols such as AXI/APB/AHB;

5. Familiar with clock, reset and low power verification;

6. Familiar with gate level simulation;

7. Able to identify project risk points, have team spirit, clear thinking, love to study, have the ability to work under pressure.

 

2022-08-26 14:22:24

Department: Chip development department
Team: ASIC back-end group
Education: Bachelor degree or above
Place: Beijing/Zhuhai/Xi 'an

Duty:

1. Responsible for the top layer or module integration of medium and large scale chips, STA, FV, timing fix, etc

2. Compile timing constraints and be responsible for the quality of SDC

3. Cooperate with front and back end to complete comprehensive optimization and timing sign-off;

Factor:

1. Experience in SOC chip DFT

2. Familiar with DFT process and relevant tools

3. Familiar with tcl and able to use perl/python to improve work efficiency

4. Understand chip production process, packaging and mass production process

5. familiar with comprehensive /STA is preferred

 

2023-05-23 17:26:00

Department: Chip development department
Team: ASIC back-end group
Education: Bachelor degree or above
Place: Beijing/Zhuhai/Xi 'an

Duty:

1. Responsible for the definition of DFT spec of SOC project

2. Responsible for DFT architecture design and implementation of SOC project

3. Responsible for providing DFT-related SDC and assisting back-end engineers in DFT-related timing convergence

4. Responsible for the DFT process of chip SOC and module, including SCAN(stuck-at, at speed), BSD, JTAG,LBIST, etc

5. Cooperated with the front and back end to complete comprehensive optimization and timing sign-off;

6. Participated in chip bring-up debugging, chip yield improvement and fault analysis

 

Factor:

1. Experience in SOC chip DFT

2. Familiar with DFT process and relevant tools

3. Familiar with tcl and able to use perl/python to improve work efficiency

4. Understand chip production process, packaging and mass production process

5. familiar with comprehensive /STA is preferred

 

2023-05-23 17:23:02

Department: Chip research and development department
Team: eFPGA Design Group
Education: Bachelor degree or above
Place: Beijing

Duty:

1. Assisted customized circuit and layout engineers to improve efficiency, and assisted IT engineers to optimize resources.

2. Completed part of the customized circuit design

Including the automation of EDA,

Design and validation process automation and optimization.

Design data management automation

Data collation and analysis scripting

Simple graphical interface writing

 

 

Factor:

1. Familiar with linux system, SVN management and server resource pool system BJOB;

2. Proficient in more than one scripting language, such as perl, python, shell, tcl, etc

3. Be proficient in using Makefiles

4. Familiarity with the skill language is a plus

5. Familiar with C/C++, Java and other programming languages is a plus

6. Understand custom circuit design process, and IC field experience is preferred

 

2022-08-26 15:04:02

Department: Marketing Department
Team: Applied systems department
Education: Bachelor degree or above
Place: Beijing/Zhuhai/Xi 'an

Duty:

1. Responsible for FPGA timing analysis and optimization;

2. Responsible for the development and design of FPGA system scheme, the engineering of new products, and the writing of product technical documents;

3. Responsible for technical construction and problem positioning analysis in key technical fields;

4. Responsible for the verification of version release and the positioning and analysis of software problems of customer projects.

 

Factor:

1. Bachelor degree or above, major in communication, computer, automation, electronics or related;

2. Experience in developing any FPGA chip series of Altera/Xilinx, familiar with Quartus II/ISE/Vivado/Modelsim and other EDA software, proficient in Verilog language;

3. Familiar with scripting languages such as Perl and TCL;

4. Be rigorous. Careful, have good problem analysis and learning innovation ability, good team spirit.

 

Factor:

Skill1

2023-05-25 16:03:34

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