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Breakthroughs in both software and hardware, and continuous innovation in EDA software and module hardware

2024-05-15 16:41:27

Points 

   Recently, our company's invention patents "Interconnect module control method, Interconnect module and storage medium", "configurable logic block control method, configurable logic block and Storage medium", computer software works "QT-based FPGA architecture Visualization software", "QT-based FPGA design flow visualization system" have been authorized. The introduction of the two patented technologies solves the technical problems of inflexible application caused by fixed delay and fixed power consumption of interconnect modules and reconfigurable logic blocks in programmable chips, and brings progress to the optimization of chip performance and flexible application. Two pieces of computer software have been introduced to fill the gap of efficient visualization tools for large-scale chips, providing solutions that can handle the increasing scale of chip designs.

 

 

    Technological breakthroughs   

 

In the existing technology, the speed of the wiring resource is fixed, the dedicated line is dedicated, and the delay on the wiring cannot be adjusted.

 

 

NEWS

 

 

 

   Our company has two invention patents, "Interconnect Module control method, Interconnect Module and Storage Medium", "Configurable Logic Block control method, configurable logic block and Storage medium", which solve the technical problems of fixed delay and fixed power consumption of interconnect module and configurable logic block in existing programmable chips.

     By giving the appropriate value to the backbias voltage of the modules in the circuit and changing the threshold of the transistors, the backbias voltage of the interconnect module and the reconfigurable logic block can be adjusted to realize different operation modes, so as to realize the technical effect of flexible choice in reducing power consumption or improving performance.

 

 

 

 

FPGA Architecture Visualization Software Based on QT

Provide users with a comprehensive FPGA architecture visualization experience:

NEWS

NEWS

1

Architecture visualization

This software supports multi-angle and multi-level visualization of FPGA architecture, provides rich interactive functions such as rotation and scaling, so that users can comprehensively and intuitively understand the internal structure of FPGA, and provide strong support for subsequent analysis and design work.

2

Interactive resource exploration

This system provides an efficient and interactive resource exploration mechanism, and users can obtain the detailed name and location information of resources in real time. This function improves the accuracy of problem analysis and location, saves a lot of time and effort for users, and enhances the convenience of FPGA design.

3

Display options control

In order to meet the needs of different users, the software provides flexible display options control functions. Users can easily switch between different display modes by simple button operation, including the display of resource name and location, and the detailed display of internal logic, so as to adapt to different occasions and needs.

4

Schema file parsing

The system has a powerful architecture file parsing ability, which can accurately parse and display the logical resource usage location defined in the file. This function not only simplifies the data import and processing process, improves the work efficiency, but also ensures the accuracy and reliability of the data, which provides a strong guarantee for the user's FPGA design work.

 

 

 

 

FPGA Design Flow Visualization System Based on QT

Provide users with a comprehensive FPGA development experience:

NEWS

1

File editing

The system supports the editing of multiple language format files, including but not limited to common hardware description languages, to ensure that users can flexibly respond to various requirements when designing FPGA.

2

Synthesis

The system uses self-developed efficient FPGA synthesis algorithm to fine-tune the circuit timing, and can efficiently convert Verilog, SystemVerilog and other language programs into multiple format netlist files, which lays a solid foundation for subsequent placement and routing work.

3

Layout and routing

In the process of placement and routing, the system optimize the design circuit based on the optimal timing for many times, and strive to find the best balance between design requirements and physical constraints to ensure that the circuit achieves the optimal performance in terms of speed, power consumption and space utilization, so as to provide users with an excellent FPGA development experience.

4

Program download

This system supports to directly download the code stream file of the circuit compilation output to the FPGA chip, and is compatible with all types of self-developed chips, which provides great convenience and flexibility for users.

 

 

 

   After long-term unremitting efforts and technological innovation, our company has successfully obtained a number of intellectual property rights in the field of chip design authorization. This remarkable achievement fully demonstrates our strong strength in the field of technology research and development, but also provides new ideas and development paths for the future development of chip technology. We firmly believe that the successful research and development of this technology will play an important role in promoting the progress of the semiconductor industry and inject new vitality and motivation to the whole industry.